Huawei semiconductor chief He Tingbo unveiled the Tau (τ) Scaling Law and LogicFolding technology at the IEEE symposium in Shanghai. This methodology aims to overcome manufacturing limitations caused by restricted access to extreme ultraviolet (EUV) lithography equipment.
Huawei expects to achieve 1.4-nanometer transistor density by 2031. This target trails industry leader TSMC’s 2028 mass production timeline by three years. The strategy seeks to bypass the need for ASML’s most advanced machinery for future chip generations.
The development supports Beijing’s push for domestic semiconductor self-sufficiency amid US export controls. While the 2031 goal remains unproven at scale, the innovation is a significant metric for technology and growth ETFs.