TSMC launched a dual-track evaluation for its CoPoS pilot line in Longtan on June 16, 2026. The company is testing equipment from both global and Taiwanese suppliers to optimize process stability.
This strategic initiative aims to improve cost and efficiency for the next generation of AI chips. While current CoWoS wafer-level packaging offers higher interconnection density, CoPoS is a key component of the company's future roadmap.
TSMC expects to reach mass production for CoPoS technology within two to three years. The move underscores the company's commitment to maintaining leadership in advanced packaging solutions.